Versal VCK190 ACAP

The dataset used in the paper is the Versal VCK190 ACAP, which is a heterogeneous architecture containing a dual-core ARM Cortex-A72 processor, a dual-core ARM Cortex-R5F processor, 1,968 DSPs, a customizable FPGA, and 400 standalone AIE tiles.

Data and Resources

Cite this as

Jie Lei, José Flich, Enrique S. Quintana-Ortí (2025). Dataset: Versal VCK190 ACAP. https://doi.org/10.57702/32iyy9cr

DOI retrieved: January 2, 2025

Additional Info

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Created January 2, 2025
Last update January 2, 2025
Defined In https://doi.org/10.48550/arXiv.2302.07594
Author Jie Lei
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José Flich
Enrique S. Quintana-Ortí
Homepage https://www.xilinx.com/products/versal/vck190.html